DocumentCode
2767757
Title
Exploration of reconfigurable architectures: an empirical approach
Author
Ligon, W.B., III ; Ramachandran, U.
Author_Institution
Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
1990
fDate
8-10 Oct 1990
Firstpage
205
Lastpage
214
Abstract
An approach to designing computer architectures in which architectural features are analyzed for utility and cost with respect to the system software that uses them is applied to reconfigurable architectures. A notation for classifying reconfigurable architectures that covers three major areas of reconfigurable architecture design-processor reconfiguration, control reconfiguration, and connection reconfiguration-is presented. A simulator based on this notation, called the reconfigurable architecture workbench, is described. This has been used to study the effects of processor reconfiguration within the image-processing application domain. Experimental results showing that some types of processor reconfiguration provide significant speedup over parallel architectures without processor reconfiguration are presented. The engineering problems present in implementing processor reconfiguration are explored, and some solutions to these problems are suggested
Keywords
parallel architectures; computer architectures; connection reconfiguration; control reconfiguration; engineering problems; image-processing; parallel architectures; processor reconfiguration; reconfigurable architecture workbench; reconfigurable architectures; simulator; system software; Analytical models; Application software; Computational modeling; Computer aided instruction; Computer architecture; Costs; Parallel architectures; Parallel processing; Process control; Reconfigurable architectures;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers of Massively Parallel Computation, 1990. Proceedings., 3rd Symposium on the
Conference_Location
College Park, MD
Print_ISBN
0-8186-2053-6
Type
conf
DOI
10.1109/FMPC.1990.89461
Filename
89461
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