DocumentCode
2767919
Title
Automatic Generation and Optimisation of Reconfigurable Financial Monte-Carlo Simulations
Author
Thomas, David B. ; Bower, Jacob A. ; Luk, Wayne
Author_Institution
Imperial Coll. London, London
fYear
2007
fDate
9-11 July 2007
Firstpage
168
Lastpage
173
Abstract
Monte-Carlo simulations are used in many applications, such as option pricing and portfolio evaluation. Due to their high computational load and intrinsic parallelism, they are ideal candidates for acceleration using reconfigurable hardware. However, for maximum efficiency the hardware configuration must be parametrised to match the characteristics of both the simulation task and the platform on which it will be executed. This paper presents a methodology for the automatic implementation of Monte-Carlo simulations, starting from a high-level mathematical description of the simulation and resulting in an optimised hardware configuration for a given platform. This process automatically generates fully-pipelined hardware for maximum performance; it also maximises thread-level parallelism by instantiating multiple pipelines to optimise device utilisation. The configured hardware is used by an associated software component to execute simulations using run-time supplied parameters. The proposed methodology is demonstrated by five different Monte-Carlo simulations, including log-normal price movements, correlated asset Value-at-Risk calculation, and price movements under the GARCH model. Our results show that hardware implementations from our approach, on a Xilinx Virtex-4 XC4VSX55 FPGA at 150 MHz, can run on-average 80 times faster than software on a 2.66 GHz Xeon PC.
Keywords
Monte Carlo methods; financial data processing; optimisation; automatic generation; optimisation; option pricing; portfolio evaluation; reconfigurable financial Monte-Carlo simulations; Acceleration; Computational modeling; Concurrent computing; Hardware; Optimization methods; Parallel processing; Pipelines; Portfolios; Pricing; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-specific Systems, Architectures and Processors, 2007. ASAP. IEEE International Conf. on
Conference_Location
Montreal, Que.
ISSN
2160-0511
Print_ISBN
978-1-4244-1026-2
Electronic_ISBN
2160-0511
Type
conf
DOI
10.1109/ASAP.2007.4429975
Filename
4429975
Link To Document