Title :
A 193-bit encryption processor for elliptic curve cryptosystem using fast VLSI algorithms in finite fields
Author_Institution :
Dept. of Electron. & Inf. Eng., Mokwon Univ., Daejeon, South Korea
Abstract :
We have developed a 193-bit encryption processor elliptic curve (EC) cryptosystem using our proposed finite field VLSI algorithms and architectures, which include an n-times as fast GF multiplier as the serial multiplier, an n-times as fast GF divider as the existing dividers, and an algorithm for the scalar point multiplication. Implementation was made in a prototype with n=2 on a Xilinx FPGA device. The number of clock cycles needed for a scalar point multiplication was 74972, where k was given in SEG2 as the order of the base point on an EC in the 193-bit-wide finite field. We used the irreducible prime polynomial p(x) = x193 + x15 + 1, the EC parameters, and the base point G, which were also given in SEG2.
Keywords :
Galois fields; VLSI; cryptography; field programmable gate arrays; 193 bit; Xilinx FPGA device; elliptic curve cryptosystem; encryption processor; fast VLSI algorithms; finite field VLSI algorithms; irreducible prime polynomial; scalar point multiplication; Algorithm design and analysis; Circuits; Clocks; Elliptic curve cryptography; Field programmable gate arrays; Galois fields; Information security; Polynomials; Read only memory; Very large scale integration;
Conference_Titel :
Consumer Communications and Networking Conference, 2005. CCNC. 2005 Second IEEE
Print_ISBN :
0-7803-8784-8
DOI :
10.1109/CCNC.2005.1405251