DocumentCode :
2768294
Title :
FPGA Implementation of Beamforming Receivers Based on MRC and NC-LMS for DS-CDMA System
Author :
Sarraf, Elie H. ; Ahmed-Ouameur, Messaoud ; Massicotte, Daniel
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. du Quebec, Trois-Rivieres, Que.
fYear :
2006
fDate :
Sept. 2006
Firstpage :
114
Lastpage :
117
Abstract :
This paper investigates a beamforming receivers based on maximum ratio combining (MRC) and noise constraint least mean square (NC-LMS) using rapid prototyping method for FPGA implementation. Non-adaptive and adaptive beamforming techniques approaches are considered. A performance evaluation of these algorithms in a DS-CDMA system is presented and FPGA design is evaluated in term of hardware resources for Xilinx family devices using rapid prototyping methodology with Matlab-Simulink tools. Both approaches offer a good performance-complexity tradeoff favorable for FPGA implementation. However, due to the adaptive approach, the NC-LMS presents a better robustness to the fixed point arithmetic than the MRC
Keywords :
array signal processing; code division multiple access; field programmable gate arrays; least squares approximations; radio receivers; spread spectrum communication; DS-CDMA system; FPGA; Matlab-Simulink tools; Xilinx; beamforming receivers; field programmable gate array; fixed point arithmetic; maximum ratio combination; noise constraint least mean square; rapid prototyping; Algorithm design and analysis; Array signal processing; Computer languages; Field programmable gate arrays; Fixed-point arithmetic; Hardware; Multiaccess communication; Prototypes; Robustness; Signal to noise ratio;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-specific Systems, Architectures and Processors, 2006. ASAP '06. International Conference on
Conference_Location :
Steamboat Springs, CO
ISSN :
2160-0511
Print_ISBN :
0-7695-2682-9
Type :
conf
DOI :
10.1109/ASAP.2006.34
Filename :
4019501
Link To Document :
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