A Simple Central Processing Unit with Multi-Dimensional Logarithmic Number System Extensions

Author

Azarmehr, Mahzad ; Muscedere, Roberto

Author_Institution

Univ. of Windsor, Windsor

fYear

2007

fDate

9-11 July 2007

Firstpage

342

Lastpage

345

Abstract

For implementing modern and massively parallel multiplication intensive DSP applications, novel solutions such as Multidimensional Logarithmic Number System (MDLNS) have been considered. In the MDLNS, Similar to the Logarithmic Number System (LNS), some of the operations such as multiplication and division are performed rather easily. The calculation over different bases and digits are completely independent and the logarithmic properties of the MDLNS allow for a reduced complexity multiplication. The use of more than one base facilitates more precise mapping of binary data and leads to dramatic reduction in size of the exponents, and consequently to hardware savings.

Keywords

digital arithmetic; microprocessor chips; massively parallel multiplication intensive DSP application; multidimensional logarithmic number system extension; simple central processing unit; Arithmetic; Assembly; Central Processing Unit; Computer architecture; Digital signal processing; Filter bank; Finite impulse response filter; Hardware; Reduced instruction set computing; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Application-specific Systems, Architectures and Processors, 2007. ASAP. IEEE International Conf. on

Conference_Location

Montreal, Que.

ISSN

2160-0511

Print_ISBN

978-1-4244-1026-2

Electronic_ISBN

2160-0511

Type

conf

DOI

10.1109/ASAP.2007.4430003

Filename

4430003