Title :
Voltage acceleration NBTI study for a 90nm CMOS technology
Author :
Wen, S.J. ; Hinh, L. ; Puchner, H.
Author_Institution :
Technol. R&D, Cypress Semicond., San Jose, CA, USA
Abstract :
NBTI lifetime data for 10% Idsat shift (and 10% Vtsat shift) vs. stress voltage for different transistor geometries with a nitrided thin gate oxide were measured over a wide range of stress gate voltages. It was found that the voltage acceleration factor increases with decreasing stress voltage resulting in a non-linearity of the log lifetime vs. stress voltage relationship. It was also found that the large area MOSFET exhibits NBTI saturation phenomena after stressing over a long time period before it reaches the 10% Idsat shift lifetime limit criteria. The lifetime vs. PMOSFET geometry will also be discussed in detail.
Keywords :
CMOS integrated circuits; MOSFET; life testing; semiconductor device reliability; semiconductor device testing; 90 nm; CMOS technology; Idsat shift; MOSFET; NBTI lifetime data; NBTI saturation phenomena; PMOSFET geometry; Vtsat shift; log lifetime; nitrided thin gate oxide; stress gate voltage; stress voltage; transistor geometries; voltage acceleration factor; Acceleration; CMOS technology; Geometry; Isolation technology; MOSFET circuits; Niobium compounds; Semiconductor device testing; Stress measurement; Titanium compounds; Voltage;
Conference_Titel :
Integrated Reliability Workshop Final Report, 2003 IEEE International
Conference_Location :
Lake Tahoe, CA, USA
Print_ISBN :
0-7803-8157-2
DOI :
10.1109/IRWS.2003.1283324
