Title :
Analysis of Low Power High Performance XOR Gate Using GDI Technique
Author :
Nishad, Atul Kumar ; Chandel, Rajeevan
Author_Institution :
Electron. & Commun. Eng. Dept., NIT Hamirpur, Hamirpur, India
Abstract :
An analysis of XOR gate designed using Gate Diffusion Input (GDI) technique is presented in this work. Comparative investigations are also carried out for XOR gates designed using conventional, low power as well as GDI techniques. SPICE simulations verify the results. The analysis shows that at 100MHz, circuit designed using GDI technique consumes 73.79%, 73.61%, and 46.64% less power compared to conventional, CPL and DPL technique.
Keywords :
SPICE; logic gates; low-power electronics; GDI technique; SPICE simulations; gate diffusion input technique; low power high performance XOR gate; CMOS integrated circuits; Capacitance; Delay; Logic gates; Partial discharges; Power dissipation; Transistors; CPL; DPL; GDI; Gate Diffusion Input; XOR gate;
Conference_Titel :
Computational Intelligence and Communication Networks (CICN), 2011 International Conference on
Conference_Location :
Gwalior
Print_ISBN :
978-1-4577-2033-8
DOI :
10.1109/CICN.2011.37
