On-chip self-calibrated process-temperature sensor for TSV 3D integration

Author

Chiang, Tzu-Ting ; Huang, Po-Tsang ; Chuang, Ching-Te ; Chen, Kuan-Neng ; Chiou, Jin-Chern ; Chen, Kuo-Hua ; Chiu, Chi-Tsung ; Tong, Ho-Ming ; Hwang, Wei

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2012

fDate

12-14 Sept. 2012

Firstpage

370

Lastpage

375

Abstract

In TSV 3D integration, stacking multiple dies would face a severe challenge of the thermal stress and V_t scatter. In this paper, a fully on-chip self-calibrated process-temperature (PT) sensor is proposed to monitor the transistor variations (V_tn, V_tp) and temperature of the intra-die for 3D-ICs. The process information and temperature can be decoupled using the process-sensitive and temperature-dependent ring oscillators. Based on TSMC 65nm CMOS process, this sensor achieves 367.5 pJ per conversion, and the sensitivities of V_tn, V_tp and the inaccuracy of temperature are merely ±1.6mV, ±0.8mV, and ±1.5^oC, respectively.

Keywords

CMOS analogue integrated circuits; calibration; oscillators; temperature sensors; three-dimensional integrated circuits; TSMC CMOS process; TSV 3D integration; fully on-chip self-calibrated process-temperature sensor; intradie temperature; process-sensitive ring oscillators; size 65 nm; temperature-dependent ring oscillators; thermal stress; Delay; Logic gates; Radiation detectors; Ring oscillators; Temperature sensors; Threshold voltage; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference (SOCC), 2012 IEEE International

Conference_Location

Niagara Falls, NY

ISSN

2164-1676

Print_ISBN

978-1-4673-1294-3

Type

conf

DOI

10.1109/SOCC.2012.6398338

Filename

6398338