Title :
Native-conflict-avoiding track routing for double patterning technology
Author :
Lai, Bi-Ting ; Li, Tai-Hung ; Chen, Tai-Chen
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Taoyuan, Taiwan
Abstract :
Double patterning lithography is extensively used to increase the half-pitch resolution. If there is no enough space to insert a stitch for the un-decomposable pattern, a native conflict is generated. A layout with native conflicts will result in layout modification. The current researches focus on reducing the numbers of stitches and native conflicts in the post-layout or detailed routing stages. In this paper, we propose a track routing algorithm to avoid native conflicts and predict the traces of detailed routing. Experimental results show that the proposed method not only minimizes the number of native conflicts significantly, but also reduces wirelength.
Keywords :
lithography; network routing; double-patterning lithography; double-patterning technology; half-pitch resolution; layout modification; native-conflict-avoiding track routing algorithm; post-layout; routing stages; undecomposable pattern; Layout; Linear programming; Lithography; Pins; Routing; Runtime; Tracking;
Conference_Titel :
SOC Conference (SOCC), 2012 IEEE International
Conference_Location :
Niagara Falls, NY
Print_ISBN :
978-1-4673-1294-3
DOI :
10.1109/SOCC.2012.6398340