DocumentCode
2769881
Title
Plenary speaker: Low power solutions for a smarter future
Author
Grisenthwaite, Richard
Author_Institution
Technology, ARM
fYear
2012
fDate
12-14 Sept. 2012
Firstpage
3
Lastpage
3
Abstract
Today´s accelerated momentum toward an increasingly inclusive, connected world is driven by great strides that have been made in evolving low power system-on-chip technologies. SoC designers have taken a holistic approach for over a decade, creating optimally balanced systems for best in class battery life of mobile devices. It is not just about one component, but a mix of general purpose processor architecture, physical implementation, fit for purpose processing blocks and power management techniques. As the design community gears up for the next wave of innovation through leading low power systems, the complexities of implementing low power solutions is only increasing. The good news is that the way we design continues to change and evolve, creating new efficiencies and further design techniques for highly optimized systems.
Keywords
integrated circuit design; low-power electronics; system-on-chip; SoC designers; accelerated momentum; design technique; general purpose processor architecture; highly-optimized systems; innovation; low-power system-on-chip technologies; mobile device battery life; physical implementation; power management technique; purpose processing block;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference (SOCC), 2012 IEEE International
Conference_Location
Niagara Falls, NY
ISSN
2164-1676
Print_ISBN
978-1-4673-1294-3
Type
conf
DOI
10.1109/SOCC.2012.6398343
Filename
6398343
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