Experiments on data processing algorithms: Energy efficiency of wireless and untethered Field Programmable Gate Array (FPGA)-based embedded systems

In this paper we present preliminary results regarding data processing approach to energy efficiency of wireless and untethered field programmable gate array (FPGA)-based embedded systems. Re-configurability of FPGA allows for significant flexibility in its applications to embedded systems. However, high power consumption (caused by such flexibility) influences the designing process significantly. Moreover, radio communication adds additional power consumption to the overall energy budget. We present few ideas (addressing local data processing versus communicating processed data) that are envisaged to decrease the total energy spent on communicating data bits. Energy efficiency is addressed on the high-level of the designing process (the system-level). It is envisaged that results of our experiments can be also applied to other embedded systems applications, not limited to FPGA-based only.