• DocumentCode
    2770087
  • Title

    An approach for quantitative optimization of highly efficient dedicated CORDIC macros as SoC building blocks

  • Author

    Vishnoi, Upasna ; Meixner, Michael ; Noll, Tobias G.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Syst., RWTH Aachen Univ., Aachen, Germany
  • fYear
    2012
  • fDate
    12-14 Sept. 2012
  • Firstpage
    242
  • Lastpage
    247
  • Abstract
    The CORDIC algorithm is frequently used in many applications and dedicated CORDIC macros are attractive components for SoCs. In order to achieve high area- and energy-efficiency for a given specification, a systematic exploration of the design space with adequate accuracy in reasonable time is required. Based on CORDIC architecture templates and an algebraic cost-model, such a quantitative approach is described. The presented approach is not only limited to the optimization of CORDIC macros, but also can be applied to many other SoC macros.
  • Keywords
    digital arithmetic; digital signal processing chips; optimisation; system-on-chip; SoC building blocks; algebraic cost-model; energy-efficiency; high efficient dedicated CORDIC macros; quantitative approach; quantitative optimization; systematic exploration; Adders; Capacitance; Clocks; Delay; Throughput; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2012 IEEE International
  • Conference_Location
    Niagara Falls, NY
  • ISSN
    2164-1676
  • Print_ISBN
    978-1-4673-1294-3
  • Type

    conf

  • DOI
    10.1109/SOCC.2012.6398355
  • Filename
    6398355