Title :
Field-programmable gate-arrays and semi-custom designs for sinusoidal and current-regulated PWM
Author :
Green, T.C. ; Mirkazemi-Moud, M. ; Goodfellow, J.K. ; Williams, B.W.
Author_Institution :
Dept. of Electr. & Electron. Eng., Heriot-Watt Univ., Edinburgh, UK
Abstract :
Reductions in the size of power electronic equipment brought about by improved devices and packaging technology can now be matched even at moderate sales volumes by smaller control circuits employing ASICs. A digital ASIC is used to replace a microprocessor in a sinusoidal PWM system. An encoded look-up table is used to greatly reduce the silicon area required and hence reduce costs. A mixed technology ASIC is used to implement high-frequency, current-regulated PWM in a digital format with an on-chip analogue interface. This brings advantages over its all-analogue pre-cursor in terms of reduced calibration, better repeatability, precisely controllable modes of operation and lower component costs. Field-programmable gate-arrays were used for proving design concepts and testing chip performance in the complete system before committing designs to silicon, thereby saving time and costs during development and allowing greater opportunities for evaluation of the designs
Keywords :
application specific integrated circuits; cellular arrays; logic arrays; power electronics; pulse width modulation; table lookup; FPGA; current-regulated PWM; digital ASIC; encoded look-up table; field programmable array; gate-arrays; high-frequency; mixed technology ASIC; on-chip analogue interface; power electronic equipment; semi-custom design; semi-custom designs; sinusoidal PWM system;
Conference_Titel :
ASIC Technology for Power Electronics Equipment, IEE Colloquium on
Conference_Location :
London