DocumentCode :
2770286
Title :
Neuromorphic computing: A SoC scaling path for the next decades
Author :
Chen, Yiran ; Wu, Qing
Author_Institution :
Electr. & Comput. Eng., Univ. of Pittsburgh, Pittsburgh, PA, USA
fYear :
2012
fDate :
12-14 Sept. 2012
Firstpage :
290
Lastpage :
291
Abstract :
A human brain weighs ~1.5kg, and is made up of 100 billion neurons connected via an incredibly dense and complex neuron network. The network contains 4km of wire in every cubic millimeter, offering >;100-million MIPS computing capability and <;20W power. The neuromorphic computing model inspired by brain structure obtained the increased attentions from VLSI design and EDA communities following the recent device inventions like memristor, nanotube/wire, and CMOS/molecular circuitries. The three invited papers introduce the grand challenges of neuromorphic computing algorithm, system and architecture; discuss the-state-of-the-art neuromorphic systems, design methodologies, computing modeling, and applications, as well as and the implementation opportunities on System-on-Chip platform.
Keywords :
CMOS integrated circuits; VLSI; brain; memristors; molecular electronics; neural nets; system-on-chip; CMOS/molecular circuitry; EDA community; MIPS computing; SoC scaling path; VLSI design; brain structure; complex neuron network; human brain; memristor; nanotube/wire; neuromorphic computing; neuromorphic systems; system-on-chip; Brain modeling; Computational modeling; Computers; Educational institutions; Laboratories; Neuromorphics; Solid modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference (SOCC), 2012 IEEE International
Conference_Location :
Niagara Falls, NY
ISSN :
2164-1676
Print_ISBN :
978-1-4673-1294-3
Type :
conf
DOI :
10.1109/SOCC.2012.6398364
Filename :
6398364
Link To Document :
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