Title :
An FPGA implementation for a high-speed optical link with a PCIe interface
Author :
Kadric, Edin ; Manjikian, Naraig ; Zilic, Zeljko
Author_Institution :
Dept. of Electr. & Comp. Eng., McGill Univ., Montreal, QC, Canada
Abstract :
To achieve speedup for multi-node, multi-GPU computing platforms, it is necessary to overcome performance bottlenecks in networks based on Ethernet or Infiniband. This paper describes an FPGA implementation of a custom network interface for an optical link between PCIe buses of compute nodes. The implementation uses an Altera Stratix IV chip with integrated PCIe interface logic and high-speed input/output for connecting optical fiber interfaces. The interface is designed with control and buffering for concurrent data transfers. A software driver enables application programs on the host computer to use the high-speed link. A bandwidth of 8.5 Gbit/s was achieved between software applications, exceeding bandwidth reported in recent work [7].
Keywords :
field programmable gate arrays; graphics processing units; local area networks; optical links; Altera Stratix IV chip; Ethernet; FPGA implementation; bit rate 8.5 Gbit/s; high-speed optical link; infiniband; integrated PCIe interface logic; multinode multiGPU computing platforms; optical fiber interfaces; software driver; Bandwidth; Computers; Field programmable gate arrays; Optical buffering; Optical fibers;
Conference_Titel :
SOC Conference (SOCC), 2012 IEEE International
Conference_Location :
Niagara Falls, NY
Print_ISBN :
978-1-4673-1294-3
DOI :
10.1109/SOCC.2012.6398376