Title :
A novel digital loop filter architecture for bang-bang ADPLL
Author :
Abdelfattah, Moataz ; Ghoneima, Maged ; Ismail, Yehea I. ; Lotfy, Amr ; Abdelsalam, Mohamed ; Abdel-moneum, Mohamed ; Kurd, Nasser A. ; Taylor, Greg
Author_Institution :
Center of Nanoelectron. & Devices, American Univ. in Cairo/Zewail City, Cairo, Egypt
Abstract :
Bang-Bang Phase Locked Loops (BB-PLLs) exhibit a nonlinear response that is dependent on the magnitude of the phase error. This paper presents a novel Digital Loop Filter (DLF) with coefficients that adapt to the relative magnitude of the phase error, and hence, enhances system linearity. An All-Digital BB-PLL (BB-ADPLL) that incorporates the proposed DLF is implemented using 32nm technology. AMS simulations are used to demonstrate the impact of the proposed DLF on the system linearity. Furthermore, theoretical analysis indicates 75% enhancement in the linearity of the proposed system compared to conventional DLFs.
Keywords :
circuit simulation; digital filters; digital phase locked loops; AMS simulation; BB-ADPLL; DLF; all-digital bang-bang phase locked loop; digital loop filter architecture; phase error magnitude; size 32 nm; system linearity enhancement; Charge pumps; Detectors; Equations; Linearity; Mathematical model; Phase locked loops; Radiation detectors;
Conference_Titel :
SOC Conference (SOCC), 2012 IEEE International
Conference_Location :
Niagara Falls, NY
Print_ISBN :
978-1-4673-1294-3
DOI :
10.1109/SOCC.2012.6398378