• DocumentCode
    2770975
  • Title

    Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits

  • Author

    Pacha, C. ; von Arnim, K. ; Bauer, F. ; Schulz, T. ; Xiong, W. ; San, K.T. ; Marshall, A. ; Baumann, T. ; Cleavelin, C.-R. ; Schruefer, K. ; Berthold, J.

  • Author_Institution
    Infineon Technol., Munich
  • fYear
    2007
  • fDate
    11-13 Sept. 2007
  • Firstpage
    111
  • Lastpage
    114
  • Abstract
    Energy dissipation, performance, and voltage scaling of Multi-Gate FET (MuGFET) based CMOS circuits are analyzed using product-representative test circuits composed of 10 k devices. The circuits are fabricated in a low power MuGFET CMOS technology, achieve clock frequencies of 370-500MHz at VDD=1.2V, and operate down to the subthreshold region. Voltage scalability of MuGFET circuits is superior to sub-100 nm planar CMOS circuits due to excellent short-channel effect control.
  • Keywords
    CMOS integrated circuits; integrated circuit design; integrated circuit testing; low-power electronics; MuGFET; energy dissipation; low-power design techniques; multigate FET CMOS circuits; planar CMOS circuits; product-representative test circuits; voltage scaling; CMOS technology; Circuit analysis; Circuit testing; Clocks; Energy dissipation; FETs; Frequency; Performance analysis; Scalability; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
  • Conference_Location
    Munich
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4244-1125-2
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2007.4430258
  • Filename
    4430258
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2770975