Design of CMOS RF receiver front-end for IEEE 802.11b

Author

Konidala, Narendra ; Bhat, M.S.

Author_Institution

Dept. of Electron. & Commun. Eng., NITK Surathkal, Mangalore

fYear

2008

fDate

1-3 Dec. 2008

Firstpage

1

Lastpage

5

Abstract

This paper presents the design of a fully integrated receiver front-end for a 2.4 GHz RF transceiver. The proposed receiver front end (low-noise amplifier and mixer) is based on a direct conversion architecture designed in 0.18 mum CMOS technology. The chip provides a down conversion gain to the 50 MHz IF of 13.2 dB, SSB noise figure (NF) of 7.65 dB and a 3rd-order input intercept point (IIP₃) of -14.6 dBm consuming 50.6 mW at 1.8 V.

Keywords

CMOS integrated circuits; IEEE standards; MMIC amplifiers; MMIC mixers; low noise amplifiers; microwave receivers; transceivers; wireless LAN; CMOS RF receiver front-end design; CMOS technology; IEEE 802.11b standard; RF transceiver; SSB noise figure; down-conversion gain; frequency 2.4 GHz; frequency 50 MHz; gain 13.2 dB; low-noise amplifier; microwave mixer; noise figure 7.65 dB; power 50.6 mW; size 0.18 mum; third-order input intercept point; voltage 1.8 V; wireless local area network; Amplitude modulation; CMOS technology; Impedance matching; Low-noise amplifiers; Noise figure; Noise measurement; Radio frequency; Receivers; Topology; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Design, 2008. ICED 2008. International Conference on

Conference_Location

Penang

Print_ISBN

978-1-4244-2315-6

Electronic_ISBN

978-1-4244-2315-6

Type

conf

DOI

10.1109/ICED.2008.4786700

Filename

4786700