• DocumentCode
    2771152
  • Title

    A 1.2V 200-MS/s 10-bit folding and interpolating ADC in 0.13-μm CMOS

  • Author

    Chen, Yihui ; Huang, Qiuting ; Burger, Thomas

  • Author_Institution
    ETH Zurich, Zurich
  • fYear
    2007
  • fDate
    11-13 Sept. 2007
  • Firstpage
    155
  • Lastpage
    158
  • Abstract
    This paper presents a folding and interpolating ADC in a 0.13-mum CMOS technology, which achieves 10-bit resolution and 200-MS/s sample rate despite the limitations of a 1.2 V supply voltage. The converter employs an open-loop auto- zero technique to cancel preamplifier offsets, and preamplifiers provide sufficient gain to overcome offsets from the following stages, which enable 8.6ENOB (53.5 dB SNDR) to be reached. The IC measures 3.24 mm2 including pads and consumes 195 mW in total.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; preamplifiers; CMOS; analog-to-digital converter; open-loop autozero technique; preamplifier; size 0.13 micron; voltage 1.2 V; word length 10 bit; Binary codes; CMOS technology; Circuits; Clocks; Decoding; Forward error correction; Interpolation; Laboratories; Low voltage; Preamplifiers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
  • Conference_Location
    Munich
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4244-1125-2
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2007.4430269
  • Filename
    4430269
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2771152