DocumentCode
2771324
Title
A 90μW 15-bit ΔΣ ADC for digital audio
Author
Pavan, Shanthi ; Krishnapura, Nagendra ; Pandarinathan, Ramalingam ; Sankar, Prabu
Author_Institution
Indian Inst. of Technol. Madras, Chennai
fYear
2007
fDate
11-13 Sept. 2007
Firstpage
198
Lastpage
201
Abstract
Architecture, circuit design details and measurement results for a 15 bit audio continuous-time DeltaSigma modulator (CTDSM) are given. The converter, designed in a 0.18 mum CMOS technology, achieves a dynamic range of 93.5 dB in a 24 kHz bandwidth and dissipates 90 muW from a 1.8 V supply. It features a third order active-RC loop filter, a very low power 4-bit flash quantizer and an efficient excess delay compensation scheme to reduce power dissipation.
Keywords
CMOS integrated circuits; active filters; analogue-digital conversion; audio equipment; delta-sigma modulation; CMOS technology; DeltaSigma ADC; audio continuous-time DeltaSigma modulator; bandwidth 24 kHz; delay compensation scheme; digital audio; low power 4-bit flash quantizer; power 90 muW; power dissipation; size 0.18 mum; third order active-RC loop filter; voltage 1.8 V; Bandwidth; CMOS technology; Filters; Jitter; Multi-stage noise shaping; Noise reduction; Operational amplifiers; Quantization; Resistors; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Conference_Location
Munich
ISSN
1930-8833
Print_ISBN
978-1-4244-1125-2
Type
conf
DOI
10.1109/ESSCIRC.2007.4430279
Filename
4430279
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