DocumentCode
2771425
Title
Exploring technology related design-space limitations of high performance network processing
Author
McCanny, John V. ; Sezer, Sakir ; Neill, Maire O.
Author_Institution
Queen´´s Univ. Belfast, Belfast
fYear
2007
fDate
11-13 Sept. 2007
Firstpage
222
Lastpage
231
Abstract
This paper summarizes numerous research activities in high-performance networks and network security processing, and explores technology related performance constraints such as critical performance limitations of circuit architectures, which are set by the semiconductor technologies.
Keywords
telecommunication networks; telecommunication security; circuit architectures; design-space limitations; high performance network processing; network security processing; semiconductor technologies; Circuits; Computer architecture; Data security; Delay; Global communication; IP networks; Quality of service; Scheduling algorithm; Streaming media; Web and internet services;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Conference_Location
Munich
ISSN
1930-8833
Print_ISBN
978-1-4244-1125-2
Type
conf
DOI
10.1109/ESSCIRC.2007.4430285
Filename
4430285
Link To Document