DocumentCode
2771540
Title
A single die 124dB stereo audio delta sigma ADC with 111dB THD
Author
Yang, YuQing ; Sculley, Terry ; Abraham, Jacob
Author_Institution
Texas Instrum. Inc., Austin
fYear
2007
fDate
11-13 Sept. 2007
Firstpage
252
Lastpage
255
Abstract
A high performance, low power consumption, single die stereo delta sigma ADC is designed for professional audio and high precision measurement applications. A single loop, fifth-order, thirty-three level delta-sigma analog modulator with positive and negative feedforward path is implemented. An interpolated multilevel quantizer with unevenly weighted quantization levels replaces a conventional 5-bit flash type quantizer in this design. These new techniques suppress signal dependent energy inside the delta sigma loop, reduce internal channel coupling and power consumption. Integrated with an on-chip bandgap reference circuit and decimation filter, the ADC achieves 124 dB dynamic range (A-weighted), -111 dB THD over 20 kHz bandwidth. Inter-channel isolation is 130 dB. Total power consumption is less than 330 mW.
Keywords
analogue integrated circuits; delta-sigma modulation; filtering theory; interpolation; quantisation (signal); reference circuits; system-on-chip; channel coupling; decimation filter; delta sigma loop; delta-sigma analog modulator; feedforward path; interpolated multilevel quantizer; on-chip bandgap reference circuit; power consumption; precision measurement; single die stereo delta sigma ADC; Circuit topology; Clocks; Coupling circuits; Delta modulation; Dynamic range; Energy consumption; Filters; Jitter; Quantization; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Conference_Location
Munich
ISSN
1930-8833
Print_ISBN
978-1-4244-1125-2
Type
conf
DOI
10.1109/ESSCIRC.2007.4430291
Filename
4430291
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