A new multi-port memorizer with global share and feebleness conflict access

Author

Fan, Z.M. ; Liu, D. ; Tong, L. ; Zhang, H. ; Wang, W.S.

Author_Institution

Xi´´an Univ. of Technol., China

fYear

2003

fDate

16-18 Dec. 2003

Firstpage

63

Lastpage

66

Abstract

The controlled objects require the control system to deal with the high real-time and huge tasks mightily. The multi-processor and multi-computer system is the effective approach. But the communication spending among processors and computers is the bottleneck of effecting performance. Based on the analysis of the multi-processor and multi-computer system. The paper presents a new multi-port memorizer with global share and feebleness conflict access. And its structure and work principle are discussed and its performance is analyzed. The Theory and results of experiment show the memorizer can improve the communication ability among processors and computers greatly.

Keywords

random-access storage; real-time systems; shared memory systems; bottleneck; communication spending; control system; feebleness conflict access; global share; multicomputer system; multiport memorizer; multiprocessor; real-time systems; Communication system control; Control systems; Latches; Logic; Military computing; Performance analysis; Random access memory; Read-write memory; Real time systems; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits, 2003 IEEE Conference on

Print_ISBN

0-7803-7749-4

Type

conf

DOI

10.1109/EDSSC.2003.1283484

Filename

1283484