DocumentCode
2771777
Title
A high image rejection continuous-time IF sigma-delta ADC with time-sharing of input resistors
Author
Shen, J.H. ; Pun, K.P. ; Choy, C.S. ; Chan, C.F.
Author_Institution
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, China
fYear
2003
fDate
16-18 Dec. 2003
Firstpage
109
Lastpage
112
Abstract
In this paper, a novel resistor time-sharing technique is proposed to achieve higher image rejection in an intermediate frequency (IF) continuous-time (CT) sigma-delta (ΣΔ) analog-digital converter (ADC) with lowpass noise-shaping and integrated IF switching mixers. A second order modulator is used to test the image rejection performance of the overall circuit. Simulation in Matlab gives perfect image rejection performance.
Keywords
continuous time systems; resistors; sigma-delta modulation; time-sharing systems; analog-digital converter; high image rejection continuous-time IF sigma-delta ADC; integrated intermediate frequency switching mixers; lowpass noise-shaping; resistor time-sharing; second order modulator; Analog-digital conversion; Circuit testing; Computed tomography; Delta-sigma modulation; Frequency conversion; Image converters; Noise shaping; Resistors; Switching converters; Time sharing computer systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2003 IEEE Conference on
Print_ISBN
0-7803-7749-4
Type
conf
DOI
10.1109/EDSSC.2003.1283494
Filename
1283494
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