Visual image processing RAM for fast 2-D data location search

Author

Kim, Joo-Young ; Kim, Donghyun ; Lee, Seungjin ; Kim, Kwanho ; Jeon, Seonghyun ; Yoo, Hoi-Jun

Author_Institution

Korea Adv. Inst. of Sci. & Technol., Daejeon

fYear

2007

fDate

11-13 Sept. 2007

Firstpage

324

Lastpage

327

Abstract

Visual image processing RAM (VIP-RAM) for fast 2-D data location search is proposed and implemented. It finds the local maximum location of 3times3 size window in single cycle latency using hierarchical 3-bank architecture. Each bank searches intermediate maximum from 3 32-bit data in a row, and top-level logic deduces the final maximum out of 3 32-bit data from 3 banks. Each memory bank includes special logic for 3 consecutive data read and 32-bit 3 input comparator. 8 VIP-RAMs are integrated in multi-core object recognition SoC and fabricated in 0.18 mum process. VIP-RAM is measured to operate at 200 MHz for 8.2 GOPS peak performance.

Keywords

image processing; object recognition; random-access storage; system-on-chip; 2D data location search; frequency 200 MHz; hierarchical 3-bank architecture; multicore object recognition SoC; single cycle latency; size 0.18 mum; visual image processing RAM; word length 32 bit; Assembly; Circuits; Delay; Image processing; Logic devices; Memory architecture; Object recognition; Performance gain; Random access memory; Read-write memory;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European

Conference_Location

Munich

ISSN

1930-8833

Print_ISBN

978-1-4244-1125-2

Type

conf

DOI

10.1109/ESSCIRC.2007.4430309

Filename

4430309