DocumentCode
2771892
Title
An interconnection network and a routing scheme for a massively parallel message-passing multicomputer
Author
Germain, C. ; Béchennec, J.L. ; Etiemble, D. ; Sansonnet, J.-P.
Author_Institution
Univ. Paris Sud, Orsay, France
fYear
1990
fDate
8-10 Oct 1990
Firstpage
368
Lastpage
371
Abstract
The communication system of a massively parallel architecture called MEGA is presented. The implications of massive parallelism for routing strategies and communication models are discussed. A routing strategy, called forced routing, is proposed. It minimizes contention by making full use of all the shortest paths in the network. Its performance has been studied by simulation, and the results are presented. The mixed communication model used allows processes with mutual reference to have direct information exchanges. The routing strategy can be implemented within a restricted chip area in CMOS technology
Keywords
multiprocessor interconnection networks; parallel architectures; MEGA; communication system; contention; forced routing; interconnection network; massively parallel architecture; routing scheme; routing strategy; shortest paths; CMOS technology; Central Processing Unit; Fault tolerance; Hypercubes; Integrated circuit interconnections; Multiprocessor interconnection networks; Packaging machines; Parallel architectures; Routing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Frontiers of Massively Parallel Computation, 1990. Proceedings., 3rd Symposium on the
Conference_Location
College Park, MD
Print_ISBN
0-8186-2053-6
Type
conf
DOI
10.1109/FMPC.1990.89484
Filename
89484
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