DocumentCode :
277196
Title :
Practical considerations for designing ASICs which incorporate scan path and JTAG techniques
Author :
Hobbs, E.D.
fYear :
1992
fDate :
33702
Firstpage :
42614
Lastpage :
42617
Abstract :
In order for designs to be successfully tested on a production tester certain design rules must be obeyed. The rules fall into two categories based upon whether edge sensitive scan is being used or level sensitive scan is being used. Design for test considerations discussed include: verification of scan vectors; determination of the number of test vectors generated; testing of RAM and ROM blocks; functional testing; time to generate vectors; and boundary scan
fLanguage :
English
Publisher :
iet
Conference_Titel :
Automated Testing and Software Solutions, IEE Colloquium on
Conference_Location :
London
Type :
conf
Filename :
168147
Link To Document :
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