A 5 GHz, 21 dBm output-IP3 resistive feedback LNA in 90-nm CMOS

An inductor-less low noise amplifier is implemented in 90 nm CMOS using resistive feedback and non-linearity cancellation. In the high-linearity mode with non-linearity cancellation, the LNA achieves an output IP3 of 21.2 dBm and a noise figure of 2.9 dB at 5 GHz. In the low-noise mode, when the cancellation is switched off, it has a noise figure of 2.3 dB and an output IP3 of 14.3 dBm at 5 GHz. In both modes, the LNA has a gain above 24 dB with a bandwidth above 6.2 GHz. This circuit consumes 42 mW of power and occupies an active die area of 0.016 mm².