Title :
A 550mV 8dBm IIP3 4pth order analog base band filter for WLAN receivers
Author :
Matteis, Marcello De ; Amico, Stefano D. ; Giannini, Vito ; Baschirotto, Andrea
Author_Institution :
Univ. of Salento, Calabria
Abstract :
In this paper a 4th order low-pass continuous- time filter for a WLAN receiver is presented. The filter is designed to satisfy high-linearity performance while operating at very-low supply voltage. An improved bias circuit is used to operate with different opamp input and output common-mode voltages. The filter is realized in a standard 0.13 mum CMOS technology with VTHNap250 mV and VTHPap300 mV. The filter is optimally operating with supply voltage as low as 550 mV and slightly below. The filter architecture is composed by two active Gm-RC biquadratic cells, which use a single opamp per-cell with a unity-gain-bandwidth comparable to the filter cut-off frequency. This reduces the total cell power consumption. The -3 dB frequency is at 12 MHz (for WLAN applications) and this is higher than any other low-voltage continuous-time filter. The -3 dB frequency can be adjusted by means of a digitally- controlled capacitance array. The filter total area occupancy is 0.47 mm2 and the total power consumption is 3.4 mW from a single 550 mV supply. A 8 dBm-in-band IIP3 and a 13.3 dBm-out-of-band IIP3 demonstrate the validity of the proposal.
Keywords :
CMOS integrated circuits; continuous time systems; low-pass filters; radio receivers; wireless LAN; 4th order low-pass continuous- time filter; CMOS technology; IIP3 4th order analog base band filter; WLAN receivers; active Gm-RC biquadratic cells; bias circuit; frequency 12 MHz; opamp; power 550 mW; size 0.13 mum; CMOS technology; Capacitance; Circuits; Cutoff frequency; Digital control; Energy consumption; Low pass filters; Low voltage; Proposals; Wireless LAN;
Conference_Titel :
Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Conference_Location :
Munich
Print_ISBN :
978-1-4244-1125-2
DOI :
10.1109/ESSCIRC.2007.4430352