Title :
A 10-Gb/s CMOS fully integrated ILO-based CDR
Author :
Mazouffre, O. ; Goumballa, B. ; Pignol, M. ; Neveu, C. ; Deval, Y. ; Begueret, J.B.
Author_Institution :
Univ. of Bordeaux Talence, Bordeaux
Abstract :
A CDR circuit dedicated to satellite embedded data link is presented. This circuit combines an injection locked oscillator, with a phase alignment circuit, to achieve the clock recovery. The circuit was designed in a 130 nm CMOS process from STMicroelectronics. The working range is from 9.6 Gbit/s up to 10.2 Gbit/s, the power dissipation is 94 mW under 1.2 V power supply. The measured eye opening is 60 ps and 240 mV with a BER lower than 1012.
Keywords :
CMOS integrated circuits; MMIC; UHF circuits; error statistics; injection locked oscillators; network synthesis; synchronisation; BER; CDR circuit; CMOS fully integrated ILO; STMicroelectronics; bit error rate; bit rate 9.6 Gbit/s to 10.2 Gbit/s; clock recovery; injection locked oscillator; phase alignment circuit; power 94 mW; satellite embedded data link; size 130 nm; time 60 ps; voltage 240 mV; Circuits; Clocks; Delay; Detectors; Frequency; Injection-locked oscillators; Phase detection; Phase locked loops; Radiation hardening; Voltage-controlled oscillators;
Conference_Titel :
Solid State Circuits Conference, 2007. ESSCIRC 2007. 33rd European
Conference_Location :
Munich
Print_ISBN :
978-1-4244-1125-2
DOI :
10.1109/ESSCIRC.2007.4430356
