DocumentCode :
2772791
Title :
MARS-Multiprocessor architecture reconciling symbolic with numerical processing-a CPU ensemble with zero-delay branch/jump
Author :
Jang, Gia-Shuh ; Lai, Feipel ; Lee, Hung-Chang ; Maa, Yeong-Chang ; Parng, Tai-Ming ; Tsai, Jenn-Yuan
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
1989
fDate :
17-19 May 1989
Firstpage :
365
Lastpage :
370
Abstract :
The design of CPU (central processing unit) chips for the MARS project is described. They are the IFU (instruction fetch unit), IPU (integer processing unit), and LPU (list processing unit). The IFU is devised to interleave instruction fetch and execution, and thus to achieve coordinated execution among datapath chips. The IPU is the main computing engine for integer operations and operand address calculation. By using dual-instruction buffers, a reserved phase for branch/jump target fetch, and instruction decode peeping, the architecture can support almost-zero-delay branching and super-zero-delay jump. The LPU handles a Lisp runtime environment, dynamic type checking, and fast list access. In this architecture, the critical path of complex register file access and ALU operation is distributed over the LPU and IPU, and list tracing can be executed quickly by the nondelayed car or cdr instructions
Keywords :
computer architecture; multiprocessing systems; ALU operation; CPU ensemble; Lisp runtime environment; MARS project; branch/jump target fetch; complex register file access; coordinated execution; datapath chips; dual-instruction buffers; dynamic type checking; fast list access; instruction decode peeping; instruction fetch unit; integer operations; integer processing unit; list processing unit; multiprocessor architecture reconciling symbolic; numerical processing; operand address calculation; zero-delay branch/jump; Central Processing Unit; Computer architecture; Decoding; Engines; Hardware; Mars; Protocols; Reduced instruction set computing; Registers; Runtime environment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems and Applications, 1989. Proceedings of Technical Papers. 1989 International Symposium on
Conference_Location :
Taipei
Type :
conf
DOI :
10.1109/VTSA.1989.68647
Filename :
68647
Link To Document :
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