DocumentCode
2772978
Title
A Pulse-based Neural Hardware Implementation Based on the Controlled Conductance by MOSFET Circuit
Author
Han, Il Song
Author_Institution
Sheffield Univ., Sheffield
fYear
0
fDate
0-0 0
Firstpage
2793
Lastpage
2799
Abstract
This paper describes a new pulse-based neural network VLSI based on the tunable linear conductance of MOSFET circuit. The controlled conductance produces the synaptic or neuron function, which are inspired by the biological plausibility and low power consumption. The synaptic computation speed is up to maximum pulse frequency. The power consumption is reduced, as active synapses only consume the power. The neuron based on the controlled conductance demonstrates the asynchronous pulse generation with a refractory period, and the behavior of integration-and-firing. The neural network VLSI is fabricated in 0.7 micron CMOS. The experimentation exhibits the behavior of linear controlled conductance, as observed in SPICE simulation.
Keywords
MOSFET circuits; VLSI; neural nets; MOSFET circuit; controlled conductance; neural network VLSI; pulse-based neural hardware; Biological control systems; Biology computing; Energy consumption; Hardware; MOSFET circuits; Neural networks; Neurons; Pulse circuits; Tunable circuits and devices; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 2006. IJCNN '06. International Joint Conference on
Conference_Location
Vancouver, BC
Print_ISBN
0-7803-9490-9
Type
conf
DOI
10.1109/IJCNN.2006.247186
Filename
1716476
Link To Document