DocumentCode
2774042
Title
A quasi-two dimensional model for fully depleted single gate SOI MOSFETS including temperature effects
Author
Gharabagi, Roobik
Author_Institution
Dept. of Electr. Eng., St. Louis Univ., MO, USA
fYear
2000
fDate
2000
Firstpage
508
Lastpage
515
Abstract
A quasi-two dimensional model for single gate silicon on insulator (SOI) Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) is presented. Major small geometry effects such as carrier velocity saturation, mobility degradation due to normal field, channel length modulation, and drain induced barrier lowering are included. The effects of parasitic bipolar transistor, impact ionization, and device self heating due to low thermal conductivity of buried oxide layer is also included. The device carrier mobility and threshold voltage are modeled as function of temperature. The effects of source, drain, and channel resistances are considered. Modeled results are then compared to measured data and are shown to be in good agreement over a wide range of operating voltages
Keywords
MOSFET; carrier mobility; impact ionisation; semiconductor device models; silicon-on-insulator; thermal stability; Si; buried oxide layer; carrier velocity saturation; channel length modulation; channel resistance; device carrier mobility; device self heating; drain induced barrier lowering; impact ionization; mobility degradation; parasitic bipolar transistor; quasi-two dimensional model; single gate SOI MOSFET; small geometry effects; temperature effects; thermal conductivity; threshold voltage; Bipolar transistors; FETs; Geometry; Heating; Impact ionization; MOSFETs; Metal-insulator structures; Silicon on insulator technology; Thermal conductivity; Thermal degradation;
fLanguage
English
Publisher
ieee
Conference_Titel
National Aerospace and Electronics Conference, 2000. NAECON 2000. Proceedings of the IEEE 2000
Conference_Location
Dayton, OH
Print_ISBN
0-7803-6262-4
Type
conf
DOI
10.1109/NAECON.2000.894954
Filename
894954
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