DocumentCode :
2774081
Title :
New challenges emerging on the design of VLSI circuits made of MOSFETs using new gate dielectric materials
Author :
Konofaos, N. ; Alexiou, G. Ph
Author_Institution :
Comput. Eng. & Informatics Dept, Univ. of Patras, Greece
fYear :
2004
fDate :
2004
Firstpage :
92
Lastpage :
97
Abstract :
While Quality Electronic Design issues regarding typical MOSFETs constructed by well established techniques and made of SiO2 gate dielectrics are yet to optimised, new issues regarding the implementation of MOSFETs having gates made of high-k dielectric materials other than SiO2 are being raised during the last years. Parameters such as the high dielectric constant values, extra oxide charges and process related defects have to be taken into account. In this paper, such issues are addressed. The case replacing commonly used parameters of the MOSFET modelling with new ones that will take into account the presence of a material with different properties than that of SiO2 is presented and proposals are made. Moreover, a case study is presented, where a memory device is examined. An overall estimation of the proposed procedure is attempted and further work is proposed.
Keywords :
CMOS digital integrated circuits; CMOS memory circuits; DRAM chips; VLSI; equivalent circuits; integrated circuit design; leakage currents; permittivity; CMOS performance; DRAM circuit; MOSFET gates; MOSFET modelling; VLSI circuit design; equivalent circuit; extra oxide charges; high dielectric constant values; leakage currents; process related defects; Binary search trees; Circuits; Dielectric materials; High K dielectric materials; High-K gate dielectrics; Insulation; MOSFETs; Materials science and technology; Molecular beam epitaxial growth; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2004. Proceedings. 5th International Symposium on
Print_ISBN :
0-7695-2093-6
Type :
conf
DOI :
10.1109/ISQED.2004.1283656
Filename :
1283656
Link To Document :
بازگشت