Title :
Measurement and simulation of junction to board thermal resistance and its application in thermal modeling
Author :
Joiner, Bennett ; Adams, Vance
Author_Institution :
Semicond. Product Sector, Motorola Inc., Austin, TX, USA
Abstract :
The junction-to-board thermal resistance, /spl theta//sub JB/ or theta JB, is a figure of merit for the thermal performance of surface mount integrated circuit packages relative to the printed circuit board temperature. The determination of /spl theta//sub JB/ by measurement or simulation is described. Examples of the use of /spl theta//sub JB/ in thermal modeling are provided along with estimates of anticipated accuracy. This model provides substantial accuracy improvements over estimates of thermal performance based on junction-to-ambient thermal resistance.
Keywords :
circuit simulation; integrated circuit measurement; integrated circuit modelling; integrated circuit packaging; surface mount technology; thermal analysis; thermal management (packaging); thermal resistance; figure of merit; junction-to-ambient thermal resistance; junction-to-board thermal resistance; measurement; model accuracy; printed circuit board temperature; simulation; surface mount integrated circuit packages; thermal modeling; thermal performance; theta JB; Circuit simulation; Electrical resistance measurement; Integrated circuit modeling; Integrated circuit packaging; Printed circuits; Resistors; Surface resistance; Temperature sensors; Thermal factors; Thermal resistance;
Conference_Titel :
Semiconductor Thermal Measurement and Management Symposium, 1999. Fifteenth Annual IEEE
Conference_Location :
San Diego, CA, USA
Print_ISBN :
0-7803-5264-5
DOI :
10.1109/STHERM.1999.762450
