DocumentCode
2774676
Title
EVO-EXPLORER: A Tool for Designing High-Performance Digital Systems
Author
Sllame, Azeddien M.
Author_Institution
Al Fateh Univ., Tripoli
fYear
2007
fDate
18-20 Nov. 2007
Firstpage
352
Lastpage
356
Abstract
In this paper we describe a tool for designing high-performance digital systems. The system is described behaviorally in VHDL and then translated into data flow graph (DTG) structure which captures all control and data flow dependencies of the given behavioral description. Then the design process goes through architecture selection, scheduling, pipelining and component selection processes. As it enters each step, it is explored by a local exploration scheme. The set of developed algorithms tested with standard benchmarks.
Keywords
hardware description languages; integrated circuit design; VHDL; component selection process; data flow graph structure; high-performance digital systems; pipelining; scheduling; Algorithm design and analysis; Costs; Design automation; Digital systems; Flow graphs; Logic testing; Pipeline processing; Process design; Space exploration; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Innovations in Information Technology, 2007. IIT '07. 4th International Conference on
Conference_Location
Dubai
Print_ISBN
978-1-4244-1840-4
Electronic_ISBN
978-1-4244-1841-1
Type
conf
DOI
10.1109/IIT.2007.4430478
Filename
4430478
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