DocumentCode :
2774793
Title :
A high performance SIMD framework for design rule checking on Sony´s PlayStation 2 Emotion Engine platform [IC layout]
Author :
Koranne, Sandeep
fYear :
2004
fDate :
2004
Firstpage :
371
Lastpage :
376
Abstract :
We describe the design and implementation of a high performance floating-point single instruction multiple data (SIMD), edge based DRC engine supporting all-angle geometry and standard rule-decks, which has been implemented on Sony´s PlayStation 2 Emotion Engine (EE) platform. We convert DRC constructs to SIMD compliant instruction streams for the vector processing units (VPUs) in the EE. We have achieved computational performance of the order of 10e6 edge operations per second in layout analysis operations.
Keywords :
circuit CAD; floating point arithmetic; integrated circuit layout; knowledge based systems; parallel processing; vector processor systems; DRC constructs; EDA; PlayStation 2 Emotion Engine platform; SIMD; SIMD compliant instruction streams; VLIW architecture; VLSI CAD; VPU; all-angle geometry; design rule checker software; design rule checking; edge based DRC engine; floating-point single instruction multiple data; layout analysis; standard rule-decks; vector processing units; Engines; Euclidean distance; Field programmable gate arrays; Geometry; Length measurement; Manufacturing processes; Parallel processing; Size measurement; Solid modeling; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2004. Proceedings. 5th International Symposium on
Print_ISBN :
0-7695-2093-6
Type :
conf
DOI :
10.1109/ISQED.2004.1283702
Filename :
1283702
Link To Document :
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