DocumentCode
2776107
Title
A compact error model for reliable system design
Author
Israr, Adeel ; Shoufan, Abdulhadi ; Huss, Sorin A.
Author_Institution
Integrated Circuits & Syst. Lab., Tech. Univ. Darmstadt, Darmstadt, Germany
fYear
2009
fDate
21-24 June 2009
Firstpage
60
Lastpage
66
Abstract
Permanent and transient errors are inherently different in property and effect. This paper shows how to utilize this fact to develop a System Error Decision Diagram for reliable embedded systems. Based on this model an efficient approach for reliability evaluation is developed. The model and the reliability evaluation approach are assumed to be employed in a system-level design process to accelerate design space exploration. The proposed approach is demonstrated for a control system taken from the automotive domain.
Keywords
binary decision diagrams; decision support systems; embedded systems; error analysis; fault tolerant computing; hardware-software codesign; design space exploration; embedded system; fault tolerant hardware-software codesign; permanent error; reliability evaluation; system error decision diagram; transient error; Automotive engineering; Binary decision diagrams; Boolean functions; Data structures; Embedded system; Integrated circuit modeling; Integrated circuit reliability; Process design; Scheduling; Space exploration; Fault Tolerant HW/SW Co-Design; Reliability Evaluation; System Error Decision Diagram;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing & Simulation, 2009. HPCS '09. International Conference on
Conference_Location
Leipzig
Print_ISBN
978-1-4244-4906-4
Electronic_ISBN
978-1-4244-4907-1
Type
conf
DOI
10.1109/HPCSIM.2009.5191574
Filename
5191574
Link To Document