Title :
Thermal Resistance Analysis of a Multi-Stack Flip Chip 3-D Package
Author :
Chan, Y.S. ; Lee, S. W Ricky
Author_Institution :
Packaging Hong Kong Univ. of Sci. & Technol., Kowloon
Abstract :
This paper evaluates the thermal performance of a newly developed multi-stack flip chip package using the finite element method. The effect of the major parameters, identified as the solder material, the solder joint pitch, the solder joint height and the pad diameter on the thermal performance of the package is studied. Based on the finite element results, a lumped model is developed which is capable to give quick and promising results of the junction temperatures of the package for different solder joint configuration.
Keywords :
chip scale packaging; finite element analysis; flip-chip devices; thermal resistance; finite element method; multi-stack flip chip 3-D package; solder joint pitch; solder material; thermal resistance analysis; Electronic packaging thermal management; Electronics packaging; Finite element methods; Flip chip; Performance analysis; Prototypes; Soldering; Steady-state; Temperature; Thermal resistance;
Conference_Titel :
Electronic Materials and Packaging, 2006. EMAP 2006. International Conference on
Conference_Location :
Kowloon
Print_ISBN :
978-1-4244-0834-4
Electronic_ISBN :
978-1-4244-0834-4
DOI :
10.1109/EMAP.2006.4430581
