Impact of RF-based fault injection in Pierce-type crystal oscillators under EMC standard tests in microcontrollers

Crystal oscillators are usually implemented using Pierce´s configuration due to its high stability, small amount of components, and easy adjustment. With technology development and device shrinking, modern microcontroller embedded oscillators include all network components integrated on chip to attend cost-effective designs supporting both crystals and ceramic resonators. This fact makes the oscillator more sensitive to feedback network load and strays related to the ESD protections required at the external crystal I/O pins. Robust applications such as industrial, automotive, biomedical, and aerospace require aggressive EMC qualification tests where high power RF interference is injected causing jitter, frequency deviation, or even clock corruption that traduces in severe faults at system level. This work discusses the impact of RF interference on crystal oscillators. A theoretical load factor analysis is proposed and compared to experimental results obtained from a 0.35μm CMOS silicon test vehicle. Finally, a test strategy for microcontrollers and complex SoCs is presented.