DocumentCode
2776587
Title
Two New Space-Time Triple Modular Redundancy Techniques for Improving Fault Tolerance of Computer Systems
Author
Chen, Wei ; Gong, Rui ; Dai, Kui ; Liu, Fang ; Wang, Zhiying
Author_Institution
National University of Defense Technology, China
fYear
2006
fDate
Sept. 2006
Firstpage
175
Lastpage
175
Abstract
Triple Modular Redundancy (TMR) is widely used to improve fault tolerance of computer systems against transient faults. Conventional TMR is effective in protecting sequential circuits but can¿t mask transient faults in combinational circuits. New redundancy techniques called Space-Time TMR (ST-TMR) and Enhanced ST-TMR (EST-TMR) with double edge triggered registers are presented in this paper, which improve fault tolerance of both combinational circuits and sequential circuits. ST-TMR is effective in protecting throughput circuit while EST-TMR is effective in protecting state-machine circuit. This paper demonstrates the usefulness of ST-TMR and EST-TMR in two special case studies. The overhead and fault tolerance of ST-TMR and EST-TMR are compared with that of the conventional TMR. Results show that ST-TMR and EST-TMR are more effective.
Keywords
Circuit faults; Combinational circuits; Electromagnetic transients; Fault tolerance; Fault tolerant systems; Protection; Redundancy; Registers; Sequential circuits; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Information Technology, 2006. CIT '06. The Sixth IEEE International Conference on
Conference_Location
Seoul
Print_ISBN
0-7695-2687-X
Type
conf
DOI
10.1109/CIT.2006.189
Filename
4019959
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