DocumentCode
2776818
Title
Mixed-signal VLSI layout design automation tool for transition region generation
Author
Soon, Gooi Chaw ; Wee, Chew Eik
Author_Institution
Intel Microelectron., Bayan Lepas, Malaysia
fYear
2010
fDate
5-8 Dec. 2010
Firstpage
15
Lastpage
18
Abstract
This paper presents a smart “free and easy” solution to tackle the analog to digital transition region construction for our mixed-signal VLSI layout design. This analog to digital transition region is a must have VLSI layout drawing when the transition is happened from the area which is fully distributed with wide analog polysilicon gate (analog poly) to area which is distributed with narrow digital polysilicon gate (digital poly). In actual microprocessor layout design work, making an analog to digital transition region ring was used to be a painful and time consuming process due to big amount of analog IP (AIP) custom layout. The layout design rule for transition region is just too complex for layout designer to build it correct by construction. A smart ANALOGPOLY ID layer based method is applied where the method is capable to auto screen through the layout which is covered by the ANALOGPOLY ID layer and places in the appropriate transition cells which is grabbed from the special analog standard library cells. In this case, the correct number of transition cell is able to be placed in, as well as a corrected by construction transition region is generated. Our results illustrate that overall performance has been improved by at least 2×. The flow has eliminated all kind of manual works just with a click of button. The application of this flow is not only limited to one transition region generation but can be applied to many transition region generation in one layout design. Also it is capable to build the transition region in nonrectangular shape rather than only rectangular.
Keywords
VLSI; integrated circuit layout; microprocessor chips; mixed analogue-digital integrated circuits; analog polysilicon gate; analog-to-digital transition region construction; digital polysilicon gate; microprocessor layout design; mixed-signal VLSI layout design automation tool; smart ANALOGPOLY ID layer based method; transition region generation; Automation; Design automation; Layout; Libraries; Logic gates; Shape; Very large scale integration; Design Automation; Mixed-Signal Layout Design; Transition Region;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Applications and Industrial Electronics (ICCAIE), 2010 International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-9054-7
Type
conf
DOI
10.1109/ICCAIE.2010.5735038
Filename
5735038
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