DocumentCode
2777102
Title
NBTI-aware data allocation strategies for scratchpad memory based embedded systems
Author
Ferri, Cesare ; Papagiannopoulou, Dimitra ; Bahar, R. Iris ; Calimera, Andrea
Author_Institution
Sch. of Eng., Brown Univ. Providence, Providence, RI, USA
fYear
2011
fDate
27-30 March 2011
Firstpage
1
Lastpage
6
Abstract
While performance and power continue to be important metrics for embedded systems, as CMOS technologies continue to shrink, new metrics such as variability and reliability have emerged as limiting factors in the design of modern embedded systems. In particular, the reliability impact of pMOS negative bias temperature instability (NBTI) has become a serious concern. Recent works have shown how conventional leakage optimization techniques can help mitigate NBTI-induced aging effects on cache memories. In this paper we focus specifically on scratchpad memory (SPM) and present novel software approaches as a means of alleviating the NBTI-induced aging effects. In particular, we demonstrate how intelligent software directed data allocation strategies can extend the lifetime of partitioned SPMs by means of distributing the idleness across the memory sub-banks.
Keywords
CMOS memory circuits; SRAM chips; embedded systems; integrated circuit reliability; CMOS technology; NBTI-aware data allocation strategy; NBTI-induced aging effect; SPM; cache memory; embedded system; leakage optimization technique; memory subbank; pMOS NBTI; pMOS negative bias temperature instability; reliability; scratchpad memory; software directed data allocation strategy; Aging; Degradation; Embedded systems; Libraries; Reliability; Resource management;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Workshop (LATW), 2011 12th Latin American
Conference_Location
Porto de Galinhas
Print_ISBN
978-1-4577-1489-4
Type
conf
DOI
10.1109/LATW.2011.5985932
Filename
5985932
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