Thermal effects in power MOSFETs

Over the year the state-of-the-art technologies pushed the VLSI chips to higher clock speed and packing density having a direct impact on the on-chip temperature rise. Without good thermal engineering, significantly non-uniform temperature distribution can lead to considerable on-chip temperature gradient. Although many research efforts have been focusing on the development of low power and new package design for better IC reliability, thermal problems continue to grow and demand more attention. I present here an approximate method to calculate the isotherms around the power transistors. which allows us an optimal placement of the critical modules with special matching requirements