Novel methodology for mid-frequency delta-I noise analysis of complex computer system boards and verification by measurements

Author

Garben, Bernd ; McAllister, M.F.

Author_Institution

IBM Deutschland GmbH, Boeblingen, Germany

fYear

2000

fDate

2000

Firstpage

69

Lastpage

72

Abstract

This paper describes an efficient methodology for mid-frequency delta-I noise analysis of the power distribution network of a computer system. The mid-frequency noise is caused by the current fluctuations of on-chip switching activity. The method provides very fast and efficient descriptions of highly complex packaging structures during every system development phase, which allows fast and accurate noise simulations with SPEED97. The simulation results have been confirmed by measurements to within 5%

Keywords

circuit simulation; current fluctuations; integrated circuit measurement; integrated circuit noise; integrated circuit packaging; power supply circuits; printed circuit testing; printed circuits; SPEED97 simulation; computer system; computer system boards; current fluctuations; measurement verification; mid-frequency delta-I noise analysis; mid-frequency noise; noise simulation; on-chip switching activity; packaging structure descriptions; packaging structures; power distribution network; system development phase; Capacitors; Circuit simulation; Computational modeling; Computer networks; Distributed computing; Fluctuations; Frequency; Laboratories; Packaging; Software tools;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging, 2000, IEEE Conference on.

Conference_Location

Scottsdale, AZ

Print_ISBN

0-7803-6450-3

Type

conf

DOI

10.1109/EPEP.2000.895495

Filename

895495