Title :
The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations
Author :
Cheng, B. ; Roy, S. ; Asenov, A.
Author_Institution :
Univ. of Glasgow Glasgow, Glasgow
Abstract :
Intrinsic parameter fluctuations are already a limiting factor for 6-Transistor SRAM scaling. In order to maintain the benefits of CMOS scaling, new SRAM cell designs are necessary. An 8-Transistor SRAM cell structure is investigated and the impact of random doping fluctuations on its read and write noise margins, considering various supply voltages, are discussed. The results demonstrate impressive scalability, and indicate that the scaling window is still open for SRAM in the deca-nanometer regime.
Keywords :
CMOS memory circuits; SRAM chips; semiconductor doping; 6-transistor SRAM scaling; 8-Transistor SRAM cell structure; 8T-SRAM cells; CMOS scaling; SRAM cell design; intrinsic parameter fluctuations; limiting factor; random doping fluctuation; Degradation; Fluctuations; MOSFETs; Microprocessors; Random access memory; Resource description framework; Scalability; Stability; Strontium; Voltage;
Conference_Titel :
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European
Conference_Location :
Munich
Print_ISBN :
978-1-4244-1123-8
Electronic_ISBN :
1930-8876
DOI :
10.1109/ESSDERC.2007.4430887
