DocumentCode :
2780126
Title :
A 32 bit logarithmic arithmetic unit and its performance compared to floating-point
Author :
Coleman, J.N. ; Chester, E.I.
Author_Institution :
Dept. of Electr. & Electron. Eng., Newcastle upon Tyne Univ., UK
fYear :
1999
fDate :
1999
Firstpage :
142
Lastpage :
151
Abstract :
As an alternative to floating-point, several papers have proposed the use of a logarithmic number system, in which a real number is represented as a fixed-point logarithm. Multiplication and division therefore proceed in minimal time with no rounding error. However, the system can only offer an overall advantage if addition and subtraction can be performed with speed and accuracy at least equal to that of floating-paint, but these operations require the interpolation of a non-linear function which has hitherto been either time-consuming or inaccurate. We present a procedure by which additions and subtractions can be performed rapidly and accurately, and show that these operations are thereby competitive with their floating-point equivalents. We then show that the average performance of the logarithmic system exceeds floating-point, in terms of both speed and accuracy
Keywords :
adders; fixed point arithmetic; interpolation; 32 bit; 32 bit logarithmic arithmetic unit; accuracy; addition; division; fixed-point logarithm; floating point; interpolation; logarithmic number system; multiplication; nonlinear function; performance; real number; speed; subtraction; Dynamic range; Fixed-point arithmetic; Floating-point arithmetic; Interpolation; Performance evaluation; Roundoff errors; Table lookup; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Arithmetic, 1999. Proceedings. 14th IEEE Symposium on
Conference_Location :
Adelaide, SA
ISSN :
1063-6889
Print_ISBN :
0-7695-0116-8
Type :
conf
DOI :
10.1109/ARITH.1999.762839
Filename :
762839
Link To Document :
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