Low cost architecture for structure measure distance computation

Huge and expensive computation resources are usually required to perform graph labelling at high speed. This fact restricts an extensive use of this methodology in industrial applications such as visual inspection. A new systolic architecture is presented which computes structural distances between cliques of different graphs based on a modified incremental Levenshtein distance algorithm. The distances obtained are used as a support function for graph labelling using probabilistic relaxation techniques. The proposed architecture computes the distances between k input cliques of an input graph and one reference clique of a reference graph. It does not limit the number of cliques nor cliques complexity of the input graph, so any input graph can be labelled. A low cost solution has been implemented based on FPGAs