A process technology toolbox for next generation large area crystalline silicon solar cells

For further reduction of the crystalline Silicon solar cell cost/Wp, a dual approach is required: Further reduction of the silicon material by using thinner wafer and further increasing the conversion efficiency. Considering wafer thicknesses of 150 μm and below the standard process with Ag screen-printed contacts on 50-60Ω/sq emitter and full Al BSF cannot provide the necessary efficiency increase. The reason for that is the increasing influence of the rear surface recombination current, which becomes a limited current loss mechanism. Within the Photovoltaic department in IMEC a research program has been launched with the goal of providing industrial processes for the next generation thin crystalline silicon solar cells. In this paper we are reporting on the development of a process toolbox that allows overcoming the full Al-BSF and the Ag-screen printing front-side metallization limitations. The next step towards higher efficiency targets is the implementation of novel emitter schemes and consequently advanced front-side metallization like electro-plating of copper for further photocurrent and fillfactor increase. By implementing Cu-plating as a front-side metallization, large area cells with efficiencies up to 18.4% have been fabricated. These are the initial steps for a cell concept that potentially can reach 19% efficiency in an industrial process flow. The progress towards an industrial Passivated Emitter and Rear Locally doped cell concept (i-PERL) is presented.