DocumentCode
2780316
Title
Lateral HV-MOS transistors (50V) for integration in a 0.18μm CMOS-process
Author
Groß, M. ; Stoisiek, M. ; Uhlig, T. ; Ellmers, C. ; Fürnhammer, F.
Author_Institution
Univ. Erlangen-Nurnberg, Erlangen
fYear
2007
fDate
11-13 Sept. 2007
Firstpage
179
Lastpage
182
Abstract
DS(on) *A = 36.2 mQmm2 at a breakdown voltage of 60 V. The integration of the devices in the CMOS base process uses five additional photo masks.
Keywords
CMOS integrated circuits; power MOSFET; power integrated circuits; CMOS process; breakdown voltage; lateral HV-MOS transistors; photo masks; size 0.18 mum; voltage 50 V; voltage 60 V; CMOS process; CMOS technology; Circuit topology; Costs; Doping profiles; Foundries; Signal processing; Substrates; System-on-a-chip; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European
Conference_Location
Munich
ISSN
1930-8876
Print_ISBN
978-1-4244-1123-8
Electronic_ISBN
1930-8876
Type
conf
DOI
10.1109/ESSDERC.2007.4430908
Filename
4430908
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